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CODES
2010
IEEE
13 years 6 months ago
Automatic parallelization of embedded software using hierarchical task graphs and integer linear programming
The last years have shown that there is no way to disregard the advantages provided by multiprocessor System-on-Chip (MPSoC) architectures in the embedded systems domain. Using mu...
Daniel Cordes, Peter Marwedel, Arindam Mallik
IWOMP
2007
Springer
14 years 2 months ago
Supporting OpenMP on Cell
The Cell processor is a heterogeneous multi-core processor with one Power Processing Engine (PPE) core and eight Synergistic Processing Engine (SPE) cores. Each SPE has a directly...
Kevin O'Brien, Kathryn M. O'Brien, Zehra Sura, Ton...
ARC
2010
Springer
186views Hardware» more  ARC 2010»
13 years 12 months ago
Application-Specific Signatures for Transactional Memory in Soft Processors
As reconfigurable computing hardware and in particular FPGA-based systems-on-chip comprise an increasing number of processor and accelerator cores, supporting sharing and synchroni...
Martin Labrecque, Mark Jeffrey, J. Gregory Steffan
SIGMETRICS
1996
ACM
118views Hardware» more  SIGMETRICS 1996»
14 years 22 days ago
Integrating Performance Monitoring and Communication in Parallel Computers
A large and increasing gap exists between processor and memory speeds in scalable cache-coherent multiprocessors. To cope with this situation, programmers and compiler writers mus...
Margaret Martonosi, David Ofelt, Mark Heinrich
MICRO
2006
IEEE
117views Hardware» more  MICRO 2006»
14 years 2 months ago
PathExpander: Architectural Support for Increasing the Path Coverage of Dynamic Bug Detection
Dynamic software bug detection tools are commonly used because they leverage run-time information. However, they suffer from a fundamental limitation, the Path Coverage Problem: t...
Shan Lu, Pin Zhou, Wei Liu, Yuanyuan Zhou, Josep T...