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EUROPAR
2010
Springer
13 years 8 months ago
2010
Springer
Abstract. Performance of the on-chip cache is critical for processor. The multithread program model usually employed by on-chip many-core architectures may have effects on cache ac...
ICPP
2008
IEEE
14 years 2 months ago
2008
IEEE
Computer manufacturers spend a huge amount of time, resources, and money in designing new systems and newer configurations, and their ability to reduce costs, charge competitive p...
IPPS
1999
IEEE
13 years 12 months ago
1999
IEEE
This paper aims to describe the implementation of TAKAKAW, an efficient parallel application for the simulation of molecular dynamics designed to handle large proteins in biology....
IPPS
2003
IEEE
14 years 29 days ago
2003
IEEE
Concurrent multithreaded architectures exploit both instruction-level and thread-level parallelism through a combination of branch prediction and thread-level control speculation. ...
SC
2000
ACM
14 years 1 days ago
2000
ACM
The current trend in HPC hardware is towards clusters of shared-memory (SMP) compute nodes. For applications developers the major question is how best to program these SMP cluster...