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ISCA
2010
IEEE
222views Hardware» more  ISCA 2010»
13 years 9 months ago
Cohesion: a hybrid memory model for accelerators
Two broad classes of memory models are available today: models with hardware cache coherence, used in conventional chip multiprocessors, and models that rely upon software to mana...
John H. Kelm, Daniel R. Johnson, William Tuohy, St...
GPEM
2008
128views more  GPEM 2008»
13 years 7 months ago
Coevolutionary bid-based genetic programming for problem decomposition in classification
In this work a cooperative, bid-based, model for problem decomposition is proposed with application to discrete action domains such as classification. This represents a significan...
Peter Lichodzijewski, Malcolm I. Heywood
DAC
2004
ACM
14 years 8 months ago
ORACLE: optimization with recourse of analog circuits including layout extraction
Long design cycles due to the inability to predict silicon realities is a well-known problem that plagues analog/RF integrated circuit product development. As this problem worsens...
Yang Xu, Lawrence T. Pileggi, Stephen P. Boyd
JCISE
2002
166views more  JCISE 2002»
13 years 7 months ago
The STEP Modular Architecture
The first Technical Note in this series [1] introduced the international standard ISO 10303, informally known as STEP (STandard for the Exchange of Product model data). Subsequent...
Allison Barnard Feeney
IPPS
2008
IEEE
14 years 2 months ago
Scaling alltoall collective on multi-core systems
MPI Alltoall is one of the most communication intense collective operation used in many parallel applications. Recently, the supercomputing arena has witnessed phenomenal growth o...
Rahul Kumar, Amith R. Mamidala, Dhabaleswar K. Pan...