117 search results - page 12 / 24 » NOC architecture design for multi-cluster chips |
CODES
2006
IEEE
13 years 11 months ago
2006
IEEE
During System on Chip (SoC) design, Network on Chip (NoC) prototyping is used for adapting NoC parameters to the application running on the chip. This prototyping is currently don...
DAC
2009
ACM
14 years 8 months ago
2009
ACM
In this paper, we present an NoC (Networks-on-Chip) router with an SDRAM-aware flow control. Based on a priority-based arbitration, it schedules packets to improve memory utilizat...
DATE
2007
IEEE
14 years 1 months ago
2007
IEEE
Networks-on-Chip (NoCs) have recently emerged as a scalable alternative to classical bus and point-to-point architectures. To date, performance evaluation of NoC designs is largel...
CASES
2008
ACM
13 years 9 months ago
2008
ACM
Interconnects based on Networks-on-Chip are an appealing solution to address future microprocessor designs where, very likely, hundreds of cores will be connected on a single chip...
NOCS
2007
IEEE
14 years 1 months ago
2007
IEEE
We present a novel network-on-chip-based architecture for future programmable chips (FPGAs). A key challenge for FPGA design is supporting numerous highly variable design instance...