983 search results - page 117 / 197 » Negative-Weight Cycle Algorithms |
IPPS
1999
IEEE
14 years 3 months ago
1999
IEEE
HeteroSort load balances and sorts within static or dynamic networks. Upon failure of a node or path, HeteroSort uses a genetic algorithm to minimize the distribution path by optim...
ASPDAC
2007
ACM
14 years 3 months ago
2007
ACM
In today's designs, when functional verification fails, engineers perform debugging using the provided error traces. Reducing the length of error traces can help the debugging...
CCGRID
2009
IEEE
14 years 3 months ago
2009
IEEE
This paper presents an eco-friendly daemon that reduces power and energy consumption while better maintaining high performance via an accurate workload characterization that infer...
DATE
2009
IEEE
14 years 3 months ago
2009
IEEE
In the digital VLSI cycle, logic transformations are often required to modify the design to meet different synthesis and optimization goals. Logic transformations on sequential ci...
ICCAD
2007
IEEE
14 years 3 months ago
2007
IEEE
This paper solves the variation-aware on-chip decoupling capacitance (decap) budgeting problem. Unlike previous work assuming the worst-case current load, we develop a novel stocha...