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CODES
2005
IEEE
14 years 4 months ago
Enabling unrestricted automated synthesis of portable hardware accelerators for virtual machines
The performance of virtual machines (e.g., Java Virtual Machines—JVMs) can be significantly improved when critical code sections (e.g., Java bytecode methods) are migrated from...
Miljan Vuletic, Christophe Dubach, Laura Pozzi, Pa...
ICCAD
2005
IEEE
98views Hardware» more  ICCAD 2005»
14 years 4 months ago
An architecture and a wrapper synthesis approach for multi-clock latency-insensitive systems
— This paper presents an architecture and a wrapper synthesis approach for the design of multi-clock systems-on-chips. We build upon the initial work on multi-clock latency-insen...
Ankur Agiwal, Montek Singh
ISCAS
2005
IEEE
154views Hardware» more  ISCAS 2005»
14 years 4 months ago
HIBI-based multiprocessor SoC on FPGA
Abstract — FPGAs offer excellent platform for System-onChips consisting of Intellectual Property (IP) blocks. The problem is that IP blocks and their interconnections are often F...
Erno Salminen, Ari Kulmala, Timo D. Hämä...
ICMI
2005
Springer
143views Biometrics» more  ICMI 2005»
14 years 4 months ago
A look under the hood: design and development of the first SmartWeb system demonstrator
Experience shows that decisions in the early phases of the development of a multimodal system prevail throughout the life-cycle of a project. The distributed architecture and the ...
Norbert Reithinger, Simon Bergweiler, Ralf Engel, ...
NOSSDAV
2005
Springer
14 years 4 months ago
Power-efficient streaming for mobile terminals
Wireless Network Interface (WNI) is one of the most critical components for power efficiency in multimedia streaming to mobile devices. A common strategy to save power is to switc...
Jari Korhonen, Ye Wang