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» Nested Loops Revisited
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DATE
2006
IEEE
108views Hardware» more  DATE 2006»
14 years 1 months ago
Scheduling under resource constraints using dis-equations
Scheduling is an important step in high-level synthesis (HLS). In our tool, we perform scheduling in two steps: coarse-grain scheduling, in which we take into account the whole co...
Hadda Cherroun, Alain Darte, Paul Feautrier
ASAP
2005
IEEE
87views Hardware» more  ASAP 2005»
14 years 1 months ago
Expression Synthesis in Process Networks generated by LAURA
The COMPAAN/LAURA [18] tool chain maps nested loop applications written in Matlab onto reconfigurable platforms, such as FPGAs. COMPAAN rewrites the original Matlab application a...
Claudiu Zissulescu, Bart Kienhuis, Ed F. Depretter...
LCR
1998
Springer
104views System Software» more  LCR 1998»
13 years 11 months ago
Locality Enhancement for Large-Scale Shared-Memory Multiprocessors
Abstract. This paper gives an overview of locality enhancement techniques used by the Jasmine compiler, currently under development at the University of Toronto. These techniques e...
Tarek S. Abdelrahman, Naraig Manjikian, Gary Liu, ...
IPPS
1996
IEEE
13 years 11 months ago
How to Optimize Residual Communications?
Minimizing communications when mapping affine loop nests onto distributed memory parallel computers has already drawn a lot of attention. This paper focuses on the next step: as i...
Michèle Dion, Cyril Randriamaro, Yves Rober...
PLDI
2005
ACM
14 years 1 months ago
Register allocation for software pipelined multi-dimensional loops
Software pipelining of a multi-dimensional loop is an important optimization that overlaps the execution of successive outermost loop iterations to explore instruction-level paral...
Hongbo Rong, Alban Douillet, Guang R. Gao