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» NetComplex: A Complexity Metric for Networked System Designs
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ASAP
2007
IEEE
175views Hardware» more  ASAP 2007»
15 years 5 months ago
Scalable Multi-FPGA Platform for Networks-On-Chip Emulation
Interconnect validation is an important early step toward global SoC (System-On-Chip) validation. Fast performances evaluation and design space exploration for NoCs (Networks-On-C...
Abdellah-Medjadji Kouadri-Mostefaoui, Benaoumeur S...
KES
1998
Springer
15 years 8 months ago
Hidden partitioning of a visual feedback-based neuro-controller
Robotic controllers take advantage from neural network learning capabilities as long as the dimensionality of the problem is kept moderate. This paper explores the possibilities of...
Jean-Philippe Urban, Jean-Luc Buessler, Julien Gre...
PODC
2003
ACM
15 years 9 months ago
Geometric ad-hoc routing: of theory and practice
All too often a seemingly insurmountable divide between theory and practice can be witnessed. In this paper we try to contribute to narrowing this gap in the field of ad-hoc rout...
Fabian Kuhn, Roger Wattenhofer, Yan Zhang, Aaron Z...
INTEGRATION
2008
183views more  INTEGRATION 2008»
15 years 4 months ago
Network-on-Chip design and synthesis outlook
With the growing complexity in consumer embedded products, new tendencies forecast heterogeneous Multi-Processor SystemsOn-Chip (MPSoCs) consisting of complex integrated component...
David Atienza, Federico Angiolini, Srinivasan Mura...
APNOMS
2006
Springer
15 years 7 months ago
Experiences in End-to-End Performance Monitoring on KOREN
As the network technology has been developed, the Next Generation Internet (NGI) such as Internet2, KOREN, KREONET2 and etc has been deployed to support bandwidth of Giga bps. And,...
Wang-Cheol Song, Deok-Jae Choi