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DATE
2007
IEEE
107views Hardware» more  DATE 2007»
15 years 11 months ago
Routing table minimization for irregular mesh NoCs
The majority of current Network on Chip (NoC) architectures employ mesh topology and use simple static routing, to reduce power and area. However, regular mesh topology is unreali...
Evgeny Bolotin, Israel Cidon, Ran Ginosar, Avinoam...
137
Voted
ICNP
2007
IEEE
15 years 11 months ago
HEXA: Compact Data Structures for Faster Packet Processing
—Data structures representing directed graphs with edges labeled by symbols from a finite alphabet are used to implement packet processing algorithms used in a variety of network...
Sailesh Kumar, Jonathan S. Turner, Patrick Crowley...
153
Voted
COREGRID
2007
Springer
15 years 10 months ago
Total Exchange Performance Prediction on Grid Environments
One of the most important collective communication patterns used in scientific applications is the complete exchange, also called All-to-All. Although efficient algorithms have b...
Luiz Angelo Steffenel, Emmanuel Jeannot
140
Voted
PAM
2007
Springer
15 years 10 months ago
Packet Capture in 10-Gigabit Ethernet Environments Using Contemporary Commodity Hardware
Abstract. Tracing traffic using commodity hardware in contemporary highspeed access or aggregation networks such as 10-Gigabit Ethernet is an increasingly common yet challenging t...
Fabian Schneider, Jörg Wallerich, Anja Feldma...
DATE
2006
IEEE
104views Hardware» more  DATE 2006»
15 years 10 months ago
Integrated placement and skew optimization for rotary clocking
—The clock distribution network is a key component of any synchronous VLSI design. High power dissipation and pressure volume temperature-induced variations in clock skew have st...
Ganesh Venkataraman, Jiang Hu, Frank Liu, Cliff C....
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