264 search results - page 44 / 53 » Network-on-Chip Architecture Exploration Framework |
ICPP
2009
IEEE
14 years 2 months ago
2009
IEEE
Parallel simulation is a technique to accelerate microarchitecture simulation of CMPs by exploiting the inherent parallelism of CMPs. In this paper, we explore the simulation para...
EUROPAR
2009
Springer
14 years 2 months ago
2009
Springer
The size of supercomputers in numbers of processors is growing exponentially. Today’s largest supercomputers have upwards of a hundred thousand processors and tomorrow’s may ha...
ISCA
2008
IEEE
14 years 2 months ago
2008
IEEE
Performance improvement solely through transistor scaling is becoming more and more difficult, thus it is increasingly common to see domain specific accelerators used in conjunc...
SUTC
2008
IEEE
14 years 2 months ago
2008
IEEE
Recently proposed usage control concept and models extend traditional access control models with features for contemporary distributed computing systems, including continuous acce...
CODES
2006
IEEE
14 years 1 months ago
2006
IEEE
Modern embedded systems for image processing involve increasingly complex levels of functionality under real-time and resourcerelated constraints. As this complexity increases, th...