49 search results - page 5 / 10 » Neural Compiler Technology for a Parallel Architecture |
ISCA
1996
IEEE
14 years 22 days ago
1996
IEEE
In the future, advanced integrated circuit processing and packaging technology will allow for several design options for multiprocessor microprocessors. In this paper we consider ...
PLSA
1994
14 years 20 days ago
1994
Computer language paradigms offer linguistic abstractions and proof theories for expressing program implementations. Similarly, system architectures offer the hardware abstractions...
MICRO
1998
IEEE
14 years 25 days ago
1998
IEEE
The inherent instruction-level parallelism (ILP) of current applications (specially those based on floating point computations) has driven hardware designers and compilers writers...
JPDC
2000
13 years 8 months ago
2000
: SIMD arrays are likely to become increasingly important as coprocessors in domain specific systems as architects continue to leverage RAM technology in their design. The problem ...
MICRO
2005
IEEE
14 years 2 months ago
2005
IEEE
An emerging trend in processor design is the addition of short vector instructions to general-purpose and embedded ISAs. Frequently, these extensions are employed using traditiona...