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DAC
2001
ACM
14 years 11 months ago
LOTTERYBUS: A New High-Performance Communication Architecture for System-on-Chip Designs
This paper presents LOTTERYBUS, a novel high-performance communication architecture for system-on-chip (SoC) designs. The LOTTERYBUS architecture was designed to address the follo...
Kanishka Lahiri, Anand Raghunathan, Ganesh Lakshmi...
AISS
2010
118views more  AISS 2010»
13 years 7 months ago
A New Method for Service Binding in Service Oriented Architecture Using Auction Algorithm
One of the important debates in service-oriented architecture is the competitive conditions in the side of service provider and service consumer. In service-oriented architecture ...
Sahar Sohangir, Mir Ali Seyyedi
HCW
2000
IEEE
14 years 2 months ago
Reliable Cluster Computing with a New Checkpointing RAID-x Architecture
In a serverless cluster of PCs or workstations, the cluster must allow remote file accesses or parallel I/O directly performed over disks distributed to all client nodes. We intro...
Kai Hwang, Hai Jin, Roy S. C. Ho, Wonwoo Ro
JUCS
2007
208views more  JUCS 2007»
13 years 9 months ago
The Architecture and Circuital Implementation Scheme of a New Cell Neural Network for Analog Signal Processing
: It is a difficult problem that using cellular neural network to make up of analog signal processing circuit. This paper presented the architecture of new cellular neural network ...
Youren Wang, Zhiqiang Zhang, Jiang Cui
CORR
2007
Springer
108views Education» more  CORR 2007»
13 years 10 months ago
SystemC Analysis of a New Dynamic Power Management Architecture
This paper presents a new dynamic power management architecture of a System on Chip. The Power State Machine describing the status of the core follows the recommendations of the A...
Massimo Conti