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ICCAD
2003
IEEE
138views Hardware» more  ICCAD 2003»
14 years 4 months ago
Multi-Million Gate FPGA Physical Design Challenges
The recent past has seen a tremendous increase in the size of design circuits that can be implemented in a single FPGA. These large design sizes significantly impact cycle time du...
Maogang Wang, Abhishek Ranjan, Salil Raje
IPPS
2006
IEEE
14 years 1 months ago
Multisite co-allocation algorithms for computational grid
Efficient multisite job scheduling facilitates the cooperation of multi-domain massively parallel processor systems in a computing grid environment. However, co-allocation, hetero...
Weizhe Zhang, A. M. K. Cheng, Mingzeng Hu
EUROPAR
2008
Springer
13 years 9 months ago
Optimized Pipelined Parallel Merge Sort on the Cell BE
Chip multiprocessors designed for streaming applications such as Cell BE offer impressive peak performance but suffer from limited bandwidth to offchip main memory. As the number o...
Jörg Keller, Christoph W. Kessler
NSPW
2006
ACM
14 years 1 months ago
Large-scale collection and sanitization of network security data: risks and challenges
Over the last several years, there has been an emerging interest in the development of widearea data collection and analysis centers to help identify, track, and formulate respons...
Phillip A. Porras, Vitaly Shmatikov
ICIP
2009
IEEE
14 years 9 months ago
Parallel Rate-distortion Optimized Intra Mode Decision On Multi-core Graphics Processors Using Greedy-based Encoding Orders
Rate-distortion (RD) optimized intra-prediction mode selection can lead to significant improvement in coding efficiency in intraframe encoding. However, it would incur considerabl...