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» New Challenges in Parallel Optimization
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ISCA
2006
IEEE
123views Hardware» more  ISCA 2006»
13 years 8 months ago
A Gracefully Degrading and Energy-Efficient Modular Router Architecture for On-Chip Networks
Packet-based on-chip networks are increasingly being adopted in complex System-on-Chip (SoC) designs supporting numerous homogeneous and heterogeneous functional blocks. These Net...
Jongman Kim, Chrysostomos Nicopoulos, Dongkook Par...
PVLDB
2010
139views more  PVLDB 2010»
13 years 6 months ago
Aether: A Scalable Approach to Logging
The shift to multi-core hardware brings new challenges to database systems, as the software parallelism determines performance. Even though database systems traditionally accommod...
Ryan Johnson, Ippokratis Pandis, Radu Stoica, Mano...
CF
2006
ACM
14 years 2 days ago
Landing openMP on cyclops-64: an efficient mapping of openMP to a many-core system-on-a-chip
This paper presents our experience mapping OpenMP parallel programming model to the IBM Cyclops-64 (C64) architecture. The C64 employs a many-core-on-a-chip design that integrates...
Juan del Cuvillo, Weirong Zhu, Guang R. Gao
ICC
2008
IEEE
116views Communications» more  ICC 2008»
14 years 2 months ago
Nonlinear Turbo Codes for Higher-Order Modulations
— In 1982 Ungerboeck presented a set-partitioning design technique for trellis coded modulation (TCM). Although this technique directly assigns constellation points to the branch...
Miguel Griot, Andres I. Vila Casado, Richard D. We...
HPDC
2006
IEEE
14 years 2 months ago
Materializing Highly Available Grids
Grids are becoming a mission-critical component in research and industry. The services they provide are thus required to be highly available, contributing to the vision of the Gri...
Mark Silberstein, Gabriel Kliot, Artyom Sharov, As...