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ISCAS
2005
IEEE
138views Hardware» more  ISCAS 2005»
14 years 1 months ago
An high speed integrated equalizer for dispersion compensation in 10Gb/s fiber networks
—This paper presents the design of a high-speed analog transversal equalizer for dispersion compensation in 10Gb/s fiber networks. We present design details of a seven tap transv...
Vasanth Kakani, Foster F. Dai, Richard C. Jaeger
TVLSI
2008
139views more  TVLSI 2008»
13 years 7 months ago
Ternary CAM Power and Delay Model: Extensions and Uses
Applications in computer networks often require high throughput access to large data structures for lookup and classification. While advanced algorithms exist to speed these search...
Banit Agrawal, Timothy Sherwood
ICNP
1996
IEEE
13 years 12 months ago
Time-Shift Scheduling: Fair Scheduling of Flows in High Speed Networks
Abstract-- We present a scheduling protocol, called TimeShift Scheduling, to forward packets from multiple input flows to a single output channel. Each input flow is guaranteed a p...
Jorge Arturo Cobb, Mohamed G. Gouda, Amal El-Nahas
ISCAPDCS
2004
13 years 9 months ago
A New Multicast Queuing Mechanism for High-Speed Packet Switches
Increasing multimedia applications such as teleconferencing and video-on-demand require the Internet to effectively provide high-performance multicast support. One of the promisin...
Min Song, Sachin Shetty, Mansoor Alam, HouJun Yang
ISCAS
2008
IEEE
287views Hardware» more  ISCAS 2008»
14 years 2 months ago
A high speed word level finite field multiplier using reordered normal basis
— Reordered normal basis is a certain permutation of a type II optimal normal basis. In this paper, a high speed design of a word level finite field multiplier using reordered ...
Ashkan Hosseinzadeh Namin, Huapeng Wu, Majid Ahmad...