The Xilinx Virtex family of FPGAs provides the ability to perform partial run-time reconfiguration, also known as dynamic partial reconfiguration (DPR). Taking this concept one st...
In dense integrated circuit designs, management of routing congestion is essential; an over congested design may be unroutable. Many factors influence congestion: placement, rout...
Scientific bibliographies in online databases provide a rich source of information for scientists in support of their research. In this paper, we propose a new method to predict po...
We propose new discrete-to-continuous interpolation models for hexagonally sampled data, that generalize two families of splines developed in the literature for the hexagonal latt...
Learning the structure of graphical models is an important task, but one of considerable difficulty when latent variables are involved. Because conditional independences using hid...