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» New Directions in Debugging Hardware Designs
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MICRO
2009
IEEE
120views Hardware» more  MICRO 2009»
14 years 3 months ago
Reducing peak power with a table-driven adaptive processor core
The increasing power dissipation of current processors and processor cores constrains design options, increases packaging and cooling costs, increases power delivery costs, and de...
Vasileios Kontorinis, Amirali Shayan, Dean M. Tull...
MSS
2000
IEEE
100views Hardware» more  MSS 2000»
14 years 1 months ago
Project 1244: IEEE Storage System Standards
Approaching its tenth anniversary, the IEEE Storage System Standards effort is in the process of balloting Media Management System (MMS) standards. These represent the first stand...
John L. Cole
ISCA
1998
IEEE
151views Hardware» more  ISCA 1998»
14 years 27 days ago
Integrated Predicated and Speculative Execution in the IMPACT EPIC Architecture
Explicitly Parallel Instruction Computing (EPIC) architectures require the compiler to express program instruction level parallelism directly to the hardware. EPIC techniques whic...
David I. August, Daniel A. Connors, Scott A. Mahlk...
SECON
2010
IEEE
13 years 6 months ago
SAND: Sectored-Antenna Neighbor Discovery Protocol for Wireless Networks
Abstract--Directional antennas offer many potential advantages for wireless networks such as increased network capacity, extended transmission range and reduced energy consumption....
Emad Felemban, Robert Murawski, Eylem Ekici, Sangj...
HOTOS
2007
IEEE
14 years 15 days ago
Hype and Virtue
In this paper, we question whether hypervisors are really acting as a disruptive force in OS research, instead arguing that they have so far changed very little at a technical lev...
Timothy Roscoe, Kevin Elphinstone, Gernot Heiser