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» New Directions in Debugging Hardware Designs
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DATE
2007
IEEE
117views Hardware» more  DATE 2007»
14 years 1 months ago
Rapid and accurate latch characterization via direct Newton solution of setup/hold times
Characterizing setup/hold times of latches and registers, a crucial component for achieving timing closure of large digital designs, typically occupies months of computation in in...
Shweta Srivastava, Jaijeet S. Roychowdhury
ASPDAC
2005
ACM
102views Hardware» more  ASPDAC 2005»
13 years 9 months ago
A framework for automated and optimized ASIP implementation supporting multiple hardware description languages
— Architecture Description Languages (ADLs) are widely used to perform design space exploration for Application Specific Instruction Set Processors (ASIPs). While the design spa...
Oliver Schliebusch, Anupam Chattopadhyay, David Ka...
ICES
2000
Springer
140views Hardware» more  ICES 2000»
13 years 11 months ago
Evolving Cellular Automata for Self-Testing Hardware
Testing is a key issue in the design and production of digital circuits: the adoption of BIST (Built-In Self-Test) techniques is increasingly popular, but requires efficient algori...
Fulvio Corno, Matteo Sonza Reorda, Giovanni Squill...
VLSISP
2008
140views more  VLSISP 2008»
13 years 7 months ago
Regular Expression Matching in Reconfigurable Hardware
In this paper we describe a regular expression pattern matching approach for reconfigurable hardware. Following a Non-deterministic Finite Automata direction, we introduce three ne...
Ioannis Sourdis, João Bispo, João M....
DATE
2008
IEEE
121views Hardware» more  DATE 2008»
14 years 1 months ago
On Automated Trigger Event Generation in Post-Silicon Validation
When searching for functional bugs in silicon, debug data is acquired after a trigger event occurs. A trigger event can be configured at run-time using a set of control registers...
Ho Fai Ko, Nicola Nicolici