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HPCA
2011
IEEE
13 years 9 days ago
A new server I/O architecture for high speed networks
Traditional architectural designs are normally focused on CPUs and have been often decoupled from I/O considerations. They are inefficient for high-speed network processing with a...
Guangdeng Liao, Xia Znu, Laxmi N. Bhuyan
IFIP
2001
Springer
14 years 1 months ago
A New Efficient VLSI Architecture for Full Search Block Matching Motion Estimation
: A new efficient type I architecture for motion estimation in video sequences based on the Full-Search Block-Matching (FSBM) algorithm is proposed in this paper. This architecture...
Nuno Roma, Leonel Sousa
HCW
2000
IEEE
14 years 1 months ago
Reliable Cluster Computing with a New Checkpointing RAID-x Architecture
In a serverless cluster of PCs or workstations, the cluster must allow remote file accesses or parallel I/O directly performed over disks distributed to all client nodes. We intro...
Kai Hwang, Hai Jin, Roy S. C. Ho, Wonwoo Ro
JUCS
2007
208views more  JUCS 2007»
13 years 8 months ago
The Architecture and Circuital Implementation Scheme of a New Cell Neural Network for Analog Signal Processing
: It is a difficult problem that using cellular neural network to make up of analog signal processing circuit. This paper presented the architecture of new cellular neural network ...
Youren Wang, Zhiqiang Zhang, Jiang Cui
FCCM
2008
IEEE
118views VLSI» more  FCCM 2008»
14 years 3 months ago
A New Powerful Scalable Generic Multi-Standard LDPC Decoder Architecture
We propose a new powerful scalable generic parallel and modular architecture well suited to LDPC code decoding. This architecture template has been instantiated in the case of the...
François Charot, Christophe Wolinski, Nicol...