—This paper is aimed at designing a congestion control system that scales gracefully with network capacity, providing high utilization, low queueing delay, dynamic stability, and...
Fernando Paganini, Zhikui Wang, Steven H. Low, Joh...
This paper proposes a new fault coverage estimation model which can be used in the early stage of VLSI design. The fault coverage model is an exponentially decaying function with ...
Continued growth in chip capacity has led to new methodologies stressing reuse, not only of pre-designed processing components, but even of entire pre-designed architectures. To b...
Good robot performance often relies upon the selection of design parameters that lead to a well conditioned Jacobian or impedance "design" matrix. In this paper, a new d...
In this paper we design interleavers for systematic repeat-accumulate (RA) codes. The new interleavers, which we call L-type and modified L-type interleavers, are deterministic, ...