666 search results - page 30 / 134 » New primal-dual algorithms for Steiner tree problems |
TCAD
2002
13 years 10 months ago
2002
Abstract--This paper presents a solution to the problem of performance-driven buffered routing tree generation for VLSI circuits. Using a novel bottom-up construction algorithm and...
ISVLSI
2003
IEEE
14 years 3 months ago
2003
IEEE
The “chicken-egg” dilemma between VLSI interconnect timing optimization and delay calculation suggests an iterative approach. We separate interconnect timing transformation as...
LION
2009
Springer
14 years 4 months ago
2009
Springer
Abstract. The rapid evolution of real-time multimedia applications requires Quality of Service (QoS) based multicast routing in underlying computer networks. The constrained Steine...
STOC
2004
ACM
14 years 10 months ago
2004
ACM
Several combinatorial optimization problems choose elements to minimize the total cost of constructing a feasible solution that satisfies requirements of clients. In the STEINER T...
VLSID
2002
IEEE
14 years 10 months ago
2002
IEEE
Interconnect with an insufficient width may be subject to electromigration and eventually cause the failure of the circuit at any time during its lifetime. This problem has gotten...