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TCAD
2011
13 years 2 months ago
High-Level Synthesis for FPGAs: From Prototyping to Deployment
—Escalating system-on-chip design complexity is the design community to raise the level of abstraction beyond register transfer level. Despite the unsuccessful adoptions of early...
Jason Cong, Bin Liu, Stephen Neuendorffer, Juanjo ...
PEPM
2009
ACM
15 years 7 months ago
Static Consistency Checking for Verilog Wire Interconnects
The Verilog hardware description language has padding semantics that allow designers to write descriptions where wires of different bit widths can be interconnected. However, many ...
Cherif Salama, Gregory Malecha, Walid Taha, Jim Gr...
JSAT
2010
108views more  JSAT 2010»
13 years 2 months ago
Experiment design and administration for computer clusters for SAT-solvers (EDACC)
The design of a SAT-solver or the modification of an existing one is always followed by a phase of intensive testing of the solver on a benchmark of instances. This task can be ve...
Adrian Balint, Daniel Gall, Gregor Kapler, Robert ...
GIS
2009
ACM
14 years 8 months ago
Web 2.0 Geospatial Visual Analytics for Improved Urban Flooding Situational Awareness and Assessment
Situational awareness of urban flooding during storm events is important for disaster and emergency management. However, no general purpose tools yet exist for rendering rainfall ...
Alejandro Rodríguez, David Hill, Jim Myers,...
ECMDAFA
2009
Springer
115views Hardware» more  ECMDAFA 2009»
14 years 2 months ago
Managing Flexibility: Modeling Binding-Times in Simulink
Abstract. Model-based development is supposed to improve the development efficiency by raising the abstraction level and generating applications instead of manually coding the appl...
Danilo Beuche, Jens Weiland