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ISCA
2003
IEEE
112views Hardware» more  ISCA 2003»
15 years 9 months ago
A Pipelined Memory Architecture for High Throughput Network Processors
Designing ASICs for each new generation of backbone routers is a time intensive and fiscally draining process. In this paper we focus on the design of a programmable architecture...
Timothy Sherwood, George Varghese, Brad Calder
ACMICEC
2003
ACM
130views ECommerce» more  ACMICEC 2003»
15 years 9 months ago
A business-to-business interoperability testbed: an overview
In this paper, we describe a business-to-business (B2B) testbed co-sponsored by the Open Applications Group, Inc. (OAGI) and the National Institute of Standard and Technology (NIS...
Boonserm Kulvatunyou, Nenad Ivezic, Monica Martin,...
MM
2000
ACM
94views Multimedia» more  MM 2000»
15 years 8 months ago
A digital television navigator
Digital television is a new, interesting, and rich platform for developing next generation multimedia services. Navigator is the most important Multimedia service of digital telev...
Chengyuan Peng, Petri Vuorimaa
CODES
1998
IEEE
15 years 8 months ago
A hardware/software prototyping environment for dynamically reconfigurable embedded systems
Next generation embedded systems place new demands on an efficient methodology for their design and verification. These systems have to support interaction over a network, multipl...
Josef Fleischmann, Klaus Buchenrieder, Rainer Kres...
ICCD
1997
IEEE
140views Hardware» more  ICCD 1997»
15 years 8 months ago
Parallel-Array Implementations of a Non-Restoring Square Root Algorithm
In this paper, we present a parallel-array implementation of a new non-restoring square root algorithm (PASQRT). The carry-save adder (CSA) is used in the parallel array. The PASQ...
Yamin Li, Wanming Chu