134 search results - page 20 / 27 » NoC-Based FPGA: Architecture and Routing |
APCSAC
2001
IEEE
14 years 6 days ago
2001
IEEE
Traditional reconfigurable computing platforms are designed to be single user and have been acknowledged to be difficult to design applications for. The design tools are still pri...
FPGA
2000
ACM
14 years 5 days ago
2000
ACM
In this paper, we study the technology mapping problem for a novel FPGA architecture that is based on k-input single-output PLA-like cells, or, k/m-macrocells. Each cell in this a...
INFOCOM
2010
IEEE
13 years 6 months ago
2010
IEEE
It is becoming apparent that the next generation IP route lookup architecture needs to achieve speeds of 100Gbps and beyond while supporting both IPv4 and IPv6 with fast real-time ...
FPGA
2000
ACM
14 years 5 days ago
2000
ACM
In this paper we revisit the FPGA architectural issue of the effect of logic block functionality on FPGA performance and density. In particular, in the context of lookup table, cl...
TVLSI
2008
13 years 8 months ago
2008
This paper describes Glitchless, a circuit-level technique for reducing power in FPGAs by eliminating unnecessary logic transitions called glitches. This is done by adding program...