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ARVLSI
2001
IEEE
289views VLSI» more  ARVLSI 2001»
13 years 11 months ago
A High-Performance 64-bit Adder Implemented in Output Prediction Logic
Output Prediction Logic (OPL) is a technique that can be applied to conventional CMOS logic families to obtain considerable speedups. When applied to static CMOS, OPL retains the ...
Sheng Sun, Larry McMurchie, Carl Sechen
GLOBECOM
2009
IEEE
14 years 2 months ago
REPARE: Regenerator Placement and Routing Establishment in Translucent Networks
—Most research works in routing and design of optical networks assume that the optical medium can carry data signals without any bit error. However, physical impairments of the o...
Weiyi Zhang, Jian Tang, Kendall E. Nygard, Chongga...
DAC
2003
ACM
14 years 1 months ago
4G terminals: how are we going to design them?
Fourth-generation wireless communication systems (4G) will have totally different requirements than what front-end designers have been coping with up to now. Designs must be targe...
Jan Craninckx, Stéphane Donnay
DAC
2009
ACM
14 years 2 months ago
Accurate temperature estimation using noisy thermal sensors
Multicore SOCs rely on runtime thermal measurements using on-chip sensors for DTM. In this paper we address the problem of estimating the actual temperature of on-chip thermal sen...
Yufu Zhang, Ankur Srivastava
ISVLSI
2008
IEEE
104views VLSI» more  ISVLSI 2008»
14 years 2 months ago
Thermal-Aware Placement of Standard Cells and Gate Arrays: Studies and Observations
In high-performance VLSI circuits, the on-chip power densities are playing dominant role due to increased scaling of technology, increasing number of components, frequency and ban...
Prasun Ghosal, Tuhina Samanta, Hafizur Rahaman, Pa...