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ARVLSI
1997
IEEE
104views VLSI» more  ARVLSI 1997»
14 years 1 months ago
A High-Speed Asynchronous Decompression Circuit for Embedded Processors
This paper describes the architecture and implementation of a high-speed decompression engine for embedded processors. The engine is targeted to processors where embedded programs...
Martin Benes, Andrew Wolfe, Steven M. Nowick
VLSID
2005
IEEE
139views VLSI» more  VLSID 2005»
14 years 10 months ago
Variable Input Delay CMOS Logic for Low Power Design
Modern digital circuits consist of logic gates implemented in the complementary metal oxide semiconductor (CMOS) technology. The time taken for a logic gate output to change after...
Tezaswi Raja, Vishwani D. Agrawal, Michael L. Bush...
ISLPED
2006
ACM
122views Hardware» more  ISLPED 2006»
14 years 3 months ago
Dynamic thermal clock skew compensation using tunable delay buffers
—The thermal gradients existing in high-performance circuits may significantly affect their timing behavior, in particular, by increasing the skew of the clock net and/or alteri...
Ashutosh Chakraborty, Karthik Duraisami, Ashoka Vi...
IJRR
2007
117views more  IJRR 2007»
13 years 9 months ago
Wave Haptics: Building Stiff Controllers from the Natural Motor Dynamics
— Haptics, like the fields of robotics and motion control, relies on high stiffness position control of electric motors. Traditionally DC motors are driven by current amplifier...
Nicola Diolaiti, Günter Niemeyer, Neal A. Tan...
ICCAD
2003
IEEE
124views Hardware» more  ICCAD 2003»
14 years 6 months ago
A Statistical Approach to Estimate the Dynamic Non-Linearity Parameters of Pipeline ADCs
A fully-analytical approach to estimate the statistics of dynamic non-linearity parameters of pipeline analog-todigital converters (ADCs) in the presence of circuit nonidealities ...
Mohammad Taherzadeh-Sani, Reza Lotfi, Omid Shoaei