339 search results - page 28 / 68 » Noise-tolerant dynamic circuit design |
DATE
2007
IEEE
14 years 4 months ago
2007
IEEE
3D integration of multiple active layers into a single chip is a viable technique that greatly reduces the length of global wires by providing vertical connections between layers....
ASPDAC
2006
ACM
14 years 3 months ago
2006
ACM
: With technology scaling, elevated temperatures caused by increased power density create a critical bottleneck modulating the circuit operation. With the advent of FinFET technolo...
NECO
2008
13 years 9 months ago
2008
While evidence indicates that neural systems may be employing sparse approximations to represent sensed stimuli, the mechanisms underlying this ability are not understood. We desc...
ICCD
2001
IEEE
14 years 6 months ago
2001
IEEE
Dynamic power is the main source of power consumption in CMOS circuits. It depends on the square of the supply voltage. It may significantly be reduced by scaling down the supply ...
DAC
2005
ACM
14 years 10 months ago
2005
ACM
This paper presents a unifying framework for the modeling of asynchronous pipeline circuits. A pipeline protocol is captured in a graph-based model which defines the partial order...