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» Noise-tolerant dynamic circuit design
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ISPD
2003
ACM
151views Hardware» more  ISPD 2003»
14 years 1 months ago
Capturing crosstalk-induced waveform for accurate static timing analysis
We propose a method to capture crosstalk-induced noisy waveform for crosstalk-aware static timing analysis. The effects of capacitive coupling noise on timing are conventionally m...
Masanori Hashimoto, Yuji Yamada, Hidetoshi Onodera
DAC
2010
ACM
14 years 10 days ago
An efficient phase detector connection structure for the skew synchronization system
Clock skew optimization continues to be an important concern in circuit designs. To overcome the influence caused by PVT variations, the automatic skew synchronization scheme can ...
Yu-Chien Kao, Hsuan-Ming Chou, Kun-Ting Tsai, Shih...
VW
2000
Springer
215views Virtual Reality» more  VW 2000»
13 years 12 months ago
A 3-D Biomechanical Model of the Salamander
This article describes a 3D biomechanical simulation of a salamander to be used in experiments in computational neuroethology. The physically-based simulation represents the salama...
Auke Jan Ijspeert
DAC
2009
ACM
14 years 9 months ago
Analysis and mitigation of process variation impacts on Power-Attack Tolerance
Embedded cryptosystems show increased vulnerabilities to implementation attacks such as power analysis. CMOS technology trends are causing increased process variations which impac...
Lang Lin, Wayne P. Burleson
MICRO
2008
IEEE
159views Hardware» more  MICRO 2008»
14 years 2 months ago
A novel cache architecture with enhanced performance and security
—Caches ideally should have low miss rates and short access times, and should be power efficient at the same time. Such design goals are often contradictory in practice. Recent f...
Zhenghong Wang, Ruby B. Lee