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ISCAS
2005
IEEE
140views Hardware» more  ISCAS 2005»
14 years 28 days ago
Low energy asynchronous architectures
: Asynchronous circuits are often presented as a means of achieving low power operation. We investigate their suitability for low-energy applications, where long battery life and d...
Ilya Obridko, Ran Ginosar
DAC
2002
ACM
14 years 8 months ago
Dynamic and leakage power reduction in MTCMOS circuits using an automated efficient gate clustering technique
Reducing power dissipation is one of the most principle subjects in VLSI design today. Scaling causes subthreshold leakage currents to become a large component of total power diss...
Mohab Anis, Mohamed Mahmoud, Mohamed I. Elmasry, S...
GLVLSI
2005
IEEE
125views VLSI» more  GLVLSI 2005»
14 years 29 days ago
Low-power circuits using dynamic threshold devices
We present simulations for ultra-thin body, fully-depleted, double-gate (DG) silicon-on-insulator (SOI) devices that can be readily optimized for both static power loss and perfor...
Paul Beckett
ISCAS
2008
IEEE
103views Hardware» more  ISCAS 2008»
14 years 1 months ago
A novel multiscroll chaotic system and its realization
Abstract— This paper proposes a novel multiscroll chaotic system, which is different from Chua’s circuit and all its variants in most aspects of the algebraic form, circuit des...
Simin Yu, Jinhu Lu, Guanrong Chen
VLSID
2002
IEEE
207views VLSI» more  VLSID 2002»
14 years 7 months ago
Synthesis of High Performance Low Power Dynamic CMOS Circuits
This paper presents a novel approach for the synthesis of dynamic CMOS circuits using Domino and Nora styles. As these logic styles can implement only non-inverting logic, convent...
Debasis Samanta, Nishant Sinha, Ajit Pal