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» Non-linear image processing in hardware
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CODES
2006
IEEE
14 years 1 months ago
The pipeline decomposition tree: : an analysis tool for multiprocessor implementation of image processing applications
Modern embedded systems for image processing involve increasingly complex levels of functionality under real-time and resourcerelated constraints. As this complexity increases, th...
Dong-Ik Ko, Shuvra S. Bhattacharyya
ISLPED
2009
ACM
154views Hardware» more  ISLPED 2009»
14 years 16 hour ago
Experimental analysis of sequence dependence on energy saving for error tolerant image processing
We present experimental analysis to exploit the sequence dependence on energy saving in error tolerant image processing. Our analysis shows that the error distributions depend not...
Se Hun Kim, Saibal Mukhopadhyay, Wayne Wolf
DFT
2006
IEEE
92views VLSI» more  DFT 2006»
14 years 1 months ago
Low-Cost Hardening of Image Processing Applications Against Soft Errors
Image processing systems are increasingly used in safetycritical applications, and their hardening against soft errors becomes an issue. We propose a methodology to identify soft ...
Ilia Polian, Bernd Becker, Masato Nakasato, Satosh...
ISCAS
2005
IEEE
121views Hardware» more  ISCAS 2005»
14 years 28 days ago
On-board fault-tolerant SAR processor for spaceborne imaging radar systems
A real-timehigh-performanceand fault-tolerantFPGA-based hardware architecture for the processing of synthetic apertureradar (SAR) images has been developed for advanced spaceborner...
Wai-Chi Fang, C. Le, S. Taft
VLSID
2003
IEEE
147views VLSI» more  VLSID 2003»
14 years 7 months ago
SoC Synthesis with Automatic Hardware Software Interface Generation
Design of efficient System-on-Chips (SoCs) require thorough application analysis to identify various compute intensive parts. These compute intensive parts can be mapped to hardwa...
Amarjeet Singh 0002, Amit Chhabra, Anup Gangwar, B...