521 search results - page 31 / 105 » Non-linear image processing in hardware |
ICCD
2004
IEEE
14 years 4 months ago
2004
IEEE
A programmable parallel digital signal processor (DSP) core for embedded applications is presented which combines the concepts of single instruction stream over multiple data stre...
SBACPAD
2008
IEEE
14 years 1 months ago
2008
IEEE
This work presents an implementation of Neocognitron Neural Network, using a high performance computing architecture based on GPU (Graphics Processing Unit). Neocognitron is an ar...
IJVR
2007
13 years 7 months ago
2007
—To construct 3D virtual scenes from two-dimensional images with depth information, image warping techniques could be used. In this paper, a novel approach of cylindrical depth i...
ICIP
2006
IEEE
14 years 9 months ago
2006
IEEE
This paper proposes a robust real-time, scalable and modular Field Programmable Gate Array (FPGA) based implementation of a spatiotemporal segmentation of video objects. The goal ...
ICIP
2003
IEEE
14 years 9 months ago
2003
IEEE
For motion estimation (ME) and discrete cosine transform (DCT) of MPEG video encoding, content variation and perceptual tolerance in video signals can be exploited to gracefully t...