325 search results - page 11 / 65 » Non-uniform Instruction Scheduling |
ICCD
2006
IEEE
14 years 4 months ago
2006
IEEE
This paper presents a new scheduling technique to improve the speed, power, and scalability of a dynamic scheduler. In a high-performance superscalar processor, the instruction sc...
MICRO
1991
IEEE
13 years 11 months ago
1991
IEEE
This paper examines two alternative approaches to supporting code scheduling for multiple-instruction-issue processors. One is to provide a set of non-trapping instructions so tha...
RTCSA
2006
IEEE
14 years 1 months ago
2006
IEEE
ILP (Instruction Level Parallelism) processors are being increasingly used in embedded systems. In embedded systems, instructions may be subject to timing constraints. An optimisi...
JUCS
2008
13 years 7 months ago
2008
: This paper1 presents an instruction scheduling algorithm based on the Subgraph Isomorphism Problem. Given a Directed Acyclic Graph (DAG) G1, our algorithm looks for a subgraph G2...
IEEEPACT
2000
IEEE
13 years 11 months ago
2000
IEEE
Recent digital signal processors (DSPs) show a homogeneous VLIW-like data path architecture, which allows C compilers to generate efficient code. However, still some special rest...