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» Non-uniform Instruction Scheduling
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CASES
2003
ACM
14 years 20 days ago
Reducing code size with echo instructions
In an embedded system, the cost of storing a program onchip can be as high as the cost of a microprocessor. Compressing an application’s code to reduce the amount of memory requ...
Jeremy Lau, Stefan Schoenmackers, Timothy Sherwood...
MICRO
1993
IEEE
128views Hardware» more  MICRO 1993»
13 years 11 months ago
Techniques for extracting instruction level parallelism on MIMD architectures
Extensive research has been done on extracting parallelism from single instruction stream processors. This paper presents some results of our investigation into ways to modify MIM...
Gary S. Tyson, Matthew K. Farrens
PLDI
2004
ACM
14 years 25 days ago
Inducing heuristics to decide whether to schedule
Instruction scheduling is a compiler optimization that can improve program speed, sometimes by 10% or more—but it can also be expensive. Furthermore, time spent optimizing is mo...
John Cavazos, J. Eliot B. Moss
EMSOFT
2003
Springer
14 years 18 days ago
Schedule-Carrying Code
We introduce the paradigm of schedule-carrying code (SCC). A hard real-time program can be executed on a given platform only if there exists a feasible schedule for the real-time t...
Thomas A. Henzinger, Christoph M. Kirsch, Slobodan...