325 search results - page 19 / 65 » Non-uniform Instruction Scheduling |
ISCA
2002
IEEE
14 years 10 days ago
2002
IEEE
Increasing the number of instruction queue (IQ) entries in a dynamically scheduled processor exposes more instruction-level parallelism, leading to higher performance. However, in...
DATE
2008
IEEE
14 years 1 months ago
2008
IEEE
To satisfy high-performance computing demand in modern embedded devices, current embedded processor architectures provide designer with possibility either to define customized ins...
MICRO
1992
IEEE
13 years 11 months ago
1992
IEEE
- We present a compilation technique for scheduling parallelism on fine grained asynchronous MIMD systems. The shape scheduling algorithm is introduced that utilizes the flexibilit...
DATE
2005
IEEE
14 years 1 months ago
2005
IEEE
In this work, we experiment with complier-directed instruction duplication to detect soft errors in VLIW datapaths . In the proposed approach, the compiler determines the instruct...
LCTRTS
2005
Springer
14 years 27 days ago
2005
Springer
Dictionary compression mechanisms identify redundant sequences of instructions that occur in a program. The sequences are extracted and copied to a dictionary. Each sequence is th...