325 search results - page 29 / 65 » Non-uniform Instruction Scheduling |
ISSS
1995
IEEE
14 years 2 months ago
1995
IEEE
This paper examines the problem of code-generation for expression trees on non-homogeneous register set architectures. It proposes and proves the optimality of an O(n) algorithm f...
CGO
2003
IEEE
14 years 4 months ago
2003
IEEE
A dynamic binary translation system for a co-designed virtual machine is described and evaluated. The underlying hardware directly executes an accumulator-oriented instruction set...
GECCO
2008
Springer
13 years 12 months ago
2008
Springer
The realization of a control unit can be done using a complex circuitry or microprogramming. The latter may be considered as an alternative method of implementation of machine ins...
IEEEPACT
2007
IEEE
14 years 5 months ago
2007
IEEE
Continued scaling of CMOS technology to smaller transistor sizes makes modern processors more susceptible to both transient and permanent hardware faults. Circuitlevel techniques ...
RTS
2006
13 years 10 months ago
2006
Estimating the Worst Case Execution Time (WCET) of a program on a given processor is important for the schedulability analysis of real-time systems. WCET analysis techniques typic...