325 search results - page 8 / 65 » Non-uniform Instruction Scheduling |
IPPS
2000
IEEE
13 years 11 months ago
2000
IEEE
In a machine that follows the dynamically trace scheduled VLIW (DTSVLIW) architecture, VLIW instructions are built dynamically through an algorithm that can be implemented in hard...
ICPPW
2006
IEEE
14 years 1 months ago
2006
IEEE
Modulo scheduling is a major optimization of high performance compilers wherein The body of a loop is replaced by an overlapping of instructions from different iterations. Hence ...
EUROPAR
2008
Springer
13 years 9 months ago
2008
Springer
Over the last decade, Message Passing Interface (MPI) has become a very successful parallel programming environment for distributed memory architectures such as clusters. However, ...
ICCAD
1994
IEEE
13 years 11 months ago
1994
IEEE
Abstract-- The design of application-specific instruction set processor (ASIP) system includes at least three interdependent tasks: microarchitecture design, instruction set design...
IEEEPACT
2002
IEEE
14 years 9 days ago
2002
IEEE
Traditional compilers perform their code generation tasks based on a fixed, pre-determined instruction set. This paper describes the implementation of a compiler that determines ...