Effective Compilation Support for Variable Instruction Set Architecture

Traditional compilers perform their code generation tasks based on a fixed, pre-determined instruction set. This paper describes the implementation of a compiler that determines the best instruction set to use for a given program and generates efficient code sequence based on it. We first give an overview of the VISC Architecture pioneered at Cognigine that exemplifies a Variable Instruction Set Architecture. We then present three compilation techniques that, when combined, enable us to provide effective compilation and optimization support for such an architecture. The first technique involves the use of an abstract operation representation that enables the code generator to optimize towards the core architecture of the processor without committing to any specific instruction format. The second technique uses an enumeration approach to scheduling that yields near-optimal instruction schedules while still adhering to the irregular constraints imposed by the architecture. We then...

• Type: Conference
• Year: 2002
• Where: IEEEPACT
• Authors: Jack Liu, Timothy Kong, Fred C. Chow
• Keywords: Distributed And Parallel Computing, IEEEPACT 2002, Instruction Set, Instruction Set Architecture, Yields Near-optimal Instruction