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ICCD
2004
IEEE
119views Hardware» more  ICCD 2004»
14 years 5 months ago
I/O Clustering in Design Cost and Performance Optimization for Flip-Chip Design
I/O placement has always been a concern in modern IC design. Due to flip-chip technology, I/O can be placed throughout the whole chip without long wires from the periphery of the...
Hung-Ming Chen, I-Min Liu, Martin D. F. Wong, Muzh...
SBCCI
2003
ACM
160views VLSI» more  SBCCI 2003»
14 years 2 months ago
Novel Design Methodology for High-Performance XOR-XNOR Circuit Design
As we scale down to deep submicron (DSM) technology, noise is becoming a metric of equal importance as power, speed, and area. Smaller feature sizes, low voltage, and high frequen...
Sumeer Goel, Mohamed A. Elgamel, Magdy A. Bayoumi
VLSID
2002
IEEE
142views VLSI» more  VLSID 2002»
14 years 9 months ago
Architecture and Design of a High Performance SRAM for SOC Design
Critical issues in designing a high speed, low power static RAM in deep submicron technologies are described along with the design techniques used to overcome them. With appropria...
Shobha Singh, Shamsi Azmi, Nutan Aarawal, Penaka P...
SLIP
2000
ACM
14 years 1 months ago
Power supply design parameters prediction for high performance IC design flows
Mariagrazia Graziano, Marco Delaurenti, Maurizio Z...