—Communication costs, which have the potential to throttle design performance as scaling continues, are mathematically modeled and compared for various pipeline methodologies. Fi...
Kenneth S. Stevens, Pankaj Golani, Peter A. Beerel
Latency-insensitive protocols allow system-on-chip (SoC) engineers to decouple the design of the computing cores from the design of the intercore communication channels while follo...
We describe ASTRX/OBLX, a synthesis system that can size high-performance analog circuit topologies to meet usersupplied linear performance specifications without designer-supplied...
Emil S. Ochotta, Rob A. Rutenbar, L. Richard Carle...
Design, performance management, and capacity planning of client/server applications in the commercial enterprise depends on the ability to model these distributed applications at ...
This paper presents the design and implementation of DECK-SCI, a multithreaded communication library that fully exploits the high-performance capabilities of the SCI technology. W...