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HOST
2008
IEEE
14 years 3 months ago
Place-and-Route Impact on the Security of DPL Designs in FPGAs
—Straightforward implementations of cryptographic algorithms are known to be vulnerable to attacks aimed not at the mathematical structure of the cipher but rather at the weak po...
Sylvain Guilley, Sumanta Chaudhuri, Jean-Luc Dange...
GLVLSI
2006
IEEE
152views VLSI» more  GLVLSI 2006»
14 years 2 months ago
2 Gbps SerDes design based on IBM Cu-11 (130nm) standard cell technology
This paper introduces a standard cell based design for a Serializer and Deserializer (SerDes) communication link. The proposed design is area, power and design time efficient as c...
Rashed Zafar Bhatti, Monty Denneau, Jeff Draper
IPPS
2006
IEEE
14 years 2 months ago
A study of the on-chip interconnection network for the IBM Cyclops64 multi-core architecture
The designs of high-performance processor architectures are moving toward the integration of a large number of multiple processing cores on a single chip. The IBM Cyclops-64 (C64)...
Yingping Zhang, Taikyeong Jeong, Fei Chen, Haiping...
LICS
2006
IEEE
14 years 2 months ago
On the Expressiveness of Linearity vs Persistence in the Asychronous Pi-Calculus
We present an expressiveness study of linearity and persistence of processes. We choose the π-calculus, one of the main representatives of process calculi, as a framework to cond...
Catuscia Palamidessi, Vijay A. Saraswat, Frank D. ...
PLDI
2005
ACM
14 years 2 months ago
Checking type safety of foreign function calls
We present a multi-lingual type inference system for checking type safety across a foreign function interface. The goal of our system is to prevent foreign function calls from int...
Michael Furr, Jeffrey S. Foster