Today, many formal analysis tools are not only used to provide certainty but are also used to debug software systems – a role that has traditional been reserved for testing tool...
Abstract. This paper argues that flatness appears as a central notion in the verification of counter automata. A counter automaton is called flat when its control graph can be ...
We describe a system as a set of communicating concurrent programs. Quasi-static scheduling compiles the concurrent programs into a sequential one. It uses a Petri net as an inter...
Cong Liu, Alex Kondratyev, Yosinori Watanabe, Albe...
fects are statically generated program abstractions, that can be model checked for verification of assertions in a temporal program logic. In this paper we develop a type and eff...
Ordered Binary Decision Diagrams (OBDDs) are a data structure for Boolean functions which supports many useful operations. It finds applications in CAD, model checking, and symbol...