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» On Coherence in Computer Algebra
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IPPS
2007
IEEE
14 years 3 months ago
A Power-Aware Prediction-Based Cache Coherence Protocol for Chip Multiprocessors
Snoopy cache coherence protocols broadcast requests to all nodes, reducing the latency of cache to cache transfer misses at the expense of increasing interconnect power. We propos...
Ehsan Atoofian, Amirali Baniasadi
AGI
2011
13 years 17 days ago
Coherence Progress: A Measure of Interestingness Based on Fixed Compressors
The ability to identify novel patterns in observations is an essential aspect of intelligence. In a computational framework, the notion of a pattern can be formalized as a program ...
Tom Schaul, Leo Pape, Tobias Glasmachers, Vincent ...
HPCA
2005
IEEE
14 years 9 months ago
Improving Multiple-CMP Systems Using Token Coherence
Improvements in semiconductor technology now enable Chip Multiprocessors (CMPs). As many future computer systems will use one or more CMPs and support shared memory, such systems ...
Michael R. Marty, Jesse D. Bingham, Mark D. Hill, ...
APPT
2009
Springer
14 years 28 days ago
Dealing with Traffic-Area Trade-Off in Direct Coherence Protocols for Many-Core CMPs
Abstract. In many-core CMP architectures, the cache coherence protocol is a key component since it can add requirements of area and power consumption to the final design and, there...
Alberto Ros, Manuel E. Acacio, José M. Garc...
CF
2007
ACM
14 years 28 days ago
Speculative supplier identification for reducing power of interconnects in snoopy cache coherence protocols
In this work we reduce interconnect power dissipation in Symmetric Multiprocessors or SMPs. We revisit snoopy cache coherence protocols and reduce unnecessary interconnect activit...
Ehsan Atoofian, Amirali Baniasadi, Kaveh Aasaraai