Sciweavers

697 search results - page 12 / 140
» On Composable System Timing, Task Timing, and WCET Analysis
Sort
View
ECRTS
2006
IEEE
14 years 1 months ago
WCET-Centric Software-controlled Instruction Caches for Hard Real-Time Systems
Cache memories have been extensively used to bridge the gap between high speed processors and relatively slower main memories. However, they are sources of predictability problems...
Isabelle Puaut
RTCSA
1999
IEEE
13 years 11 months ago
Pipeline Timing Analysis Using a Trace-Driven Simulator
In this paper we present a technique for Worst-Case Execution Time WCET analysis for pipelined processors. Our technique uses a standard simulator instead of special-purpose pipel...
Jakob Engblom, Andreas Ermedahl
JTRES
2010
ACM
13 years 7 months ago
WCET driven design space exploration of an object cache
In order to guarantee that real-time systems meet their timing specification, static execution time bounds need to be calculated. Not considering execution time predictability led...
Benedikt Huber, Wolfgang Puffitsch, Martin Schoebe...
ECRTS
2005
IEEE
14 years 1 months ago
Applying Static WCET Analysis to Automotive Communication Software
The number of embedded computers used in modern cars have increased dramatically during the last years, as they provide increased functionality to a reduced cost compared to previ...
Susanna Byhlin, Andreas Ermedahl, Jan Gustafsson, ...
ASAP
2006
IEEE
168views Hardware» more  ASAP 2006»
13 years 11 months ago
Dual-Processor Design of Energy Efficient Fault-Tolerant System
A popular approach to guarantee fault tolerance in safety-critical applications is to run the application on two processors. A checkpoint is inserted at the completion of the prim...
Shaoxiong Hua, Pushkin R. Pari, Gang Qu