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ICCAD
2001
IEEE
201views Hardware» more  ICCAD 2001»
14 years 8 months ago
An Integrated Data Path Optimization for Low Power Based on Network Flow Method
Abstract: We propose an effective algorithm for power optimization in behavioral synthesis. In previous work, it has been shown that several hardware allocation/binding problems fo...
Chun-Gi Lyuh, Taewhan Kim, Chien-Liang Liu
CCECE
2009
IEEE
14 years 6 months ago
Design and implementation of a low-power workstation
A workstation requires a low-power design similar to a typical PC. In this paper we propose several strategies to reduce the power consumption of a workstation. First, we must com...
Ying-Wen Bai, Chun-Yang Tsai
VLSID
2005
IEEE
224views VLSI» more  VLSID 2005»
14 years 11 months ago
Accurate Stacking Effect Macro-Modeling of Leakage Power in Sub-100nm Circuits
An accurate and efficient stacking effect macro-model for leakage power in sub-100nm circuits is presented in this paper. Leakage power, including subthreshold leakage power and ga...
Shengqi Yang, Wayne Wolf, Narayanan Vijaykrishnan,...
ISLPED
1997
ACM
85views Hardware» more  ISLPED 1997»
14 years 3 months ago
Low power motion estimation design using adaptive pixel truncation
Power consumption is very critical for portable video applications such as portable video-phone. Motion estimation in the video encoder requires huge amount of computation and hen...
Zhong-Li He, Kai-Keung Chan, Chi-Ying Tsui, Ming L...
DAC
1997
ACM
14 years 3 months ago
Hierarchical Sequence Compaction for Power Estimation
- This paper presents an effective technique for compacting a large sequence of input vectors into a much smaller one such that when the two sequences are applied to any circuit, t...
Radu Marculescu, Diana Marculescu, Massoud Pedram