Sciweavers

121 search results - page 10 / 25
» On Distributed Virtual Network Embedding With Guarantees
Sort
View
IPPS
1995
IEEE
14 years 2 months ago
The RACE network architecture
The RACE R parallel computer system provides a highperformance parallel interconnection network at low cost. This paper describes the architecture and implementation of the RACE ...
Bradley C. Kuszmaul
ICPP
2002
IEEE
14 years 3 months ago
Software Caching using Dynamic Binary Rewriting for Embedded Devices
A software cache implements instruction and data caching entirely in software. Dynamic binary rewriting offers a means to specialize the software cache miss checks at cache miss t...
Chad Huneycutt, Joshua B. Fryman, Kenneth M. Macke...
INFOCOM
2011
IEEE
13 years 2 months ago
Spherical representation and polyhedron routing for load balancing in wireless sensor networks
—In this paper we address the problem of scalable and load balanced routing for wireless sensor networks. Motivated by the analog of the continuous setting that geodesic routing ...
Xiaokang Yu, Xiaomeng Ban, Wei Zeng, Rik Sarkar, X...
ALGOSENSORS
2004
Springer
14 years 4 months ago
On a Conjecture Related to Geometric Routing
We conjecture that any planar 3-connected graph can be embedded in the plane in such a way that for any nodes s and t, there is a path from s to t such that the Euclidean distance ...
Christos H. Papadimitriou, David Ratajczak
SEUS
2007
IEEE
14 years 5 months ago
A Framework for Hardware-in-the-Loop Testing of an Integrated Architecture
In this paper we present a distributed Hardware-in-the-Loop (HiL) simulation approach that supports the verification and validation activities in an integrated architecture as rec...
Martin Schlager, Roman Obermaisser, Wilfried Elmen...