216 search results - page 41 / 44 » On High-Bandwidth Data Cache Design for Multi-Issue Processo... |
BTW
2007
Springer
14 years 1 months ago
2007
Springer
B-tree and index into two layers of abstraction. In addition, this paper provides algorithms for (i) concurrency control and recovery including locking of individual keys and of co...
EMSOFT
2006
Springer
13 years 11 months ago
2006
Springer
Upper bounds on worst-case execution times, which are commonly called WCET, are a prerequisite for validating the temporal correctness of tasks in a real-time system. Due to the e...
SIGCOMM
2009
ACM
14 years 2 months ago
2009
ACM
The routing architecture of the original 4.4BSD [3] kernel has been deployed successfully without major design modification for over 15 years. In the unified routing architectur...
HPCA
2007
IEEE
14 years 8 months ago
2007
IEEE
It is widely accepted that transient failures will appear more frequently in chips designed in the near future due to several factors such as the increased integration scale. On t...
HIPC
1999
Springer
14 years 17 hour ago
1999
Springer
Abstract. In this work we put into evidence how the memory performance of a WebServer machine may depend on the sharing induced by process migration. We considered a shared-bus sha...