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» On Local Register Allocation
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DATE
2006
IEEE
114views Hardware» more  DATE 2006»
14 years 2 months ago
A built-in redundancy-analysis scheme for RAMs with 2D redundancy using 1D local bitmap
Built-in self-repair (BISR) technique is gaining popular for repairing embedded memory cores in system-onchips (SOCs). To increase the utilization of memory redundancy, the BISR t...
Tsu-Wei Tseng, Jin-Fu Li, Da-Ming Chang
DAGM
2008
Springer
13 years 10 months ago
Comparing Local Feature Descriptors in pLSA-Based Image Models
Abstract. Probabilistic models with hidden variables such as probabilistic Latent Semantic Analysis (pLSA) and Latent Dirichlet Allocation (LDA) have recently become popular for so...
Eva Hörster, Thomas Greif, Rainer Lienhart, M...
DAC
1997
ACM
14 years 27 days ago
Analysis and Evaluation of Address Arithmetic Capabilities in Custom DSP Architectures
—Many application-specific architectures provide indirect addressing modes with auto-increment/decrement arithmetic. Since these architectures generally do not feature an indexe...
Ashok Sudarsanam, Stan Y. Liao, Srinivas Devadas
GLVLSI
2007
IEEE
151views VLSI» more  GLVLSI 2007»
14 years 17 days ago
Hand-in-hand verification of high-level synthesis
This paper describes a formal verification methodology of highnthesis (HLS) process. The abstraction level of the input to HLS is so high compared to that of the output that the v...
Chandan Karfa, Dipankar Sarkar, Chittaranjan A. Ma...
CASES
2009
ACM
13 years 6 months ago
Spatial complexity of reversibly computable DAG
In this paper we address the issue of making a program reversible in terms of spatial complexity. Spatial complexity is the amount of memory/register locations required for perfor...
Mouad Bahi, Christine Eisenbeis