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DATE
2006
IEEE

A built-in redundancy-analysis scheme for RAMs with 2D redundancy using 1D local bitmap

14 years 6 months ago
A built-in redundancy-analysis scheme for RAMs with 2D redundancy using 1D local bitmap
Built-in self-repair (BISR) technique is gaining popular for repairing embedded memory cores in system-onchips (SOCs). To increase the utilization of memory redundancy, the BISR technique usually needs to perform built-in redundancy-analysis (BIRA) algorithm for redundancy allocation. This paper presents an ef£cient BIRA scheme for embedded memory repair. The BIRA scheme executes the 2D redundancy allocation based on the 1D local bitmap. This enables that the BIRA circuitry can be implemented with low area cost. Also, the BIRA algorithm can provide good repair rate (i.e., the ratio of the number of repaired memories to the number of defective memories). Experimental results show that the repair rate of the proposed BIRA scheme approximates to that of the optimal scheme for the memories with different fault distributions. Also, the ratio of the analysis time to the test time is small.
Tsu-Wei Tseng, Jin-Fu Li, Da-Ming Chang
Added 10 Jun 2010
Updated 10 Jun 2010
Type Conference
Year 2006
Where DATE
Authors Tsu-Wei Tseng, Jin-Fu Li, Da-Ming Chang
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