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» On Modeling Cross-Talk Faults
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VLSID
2004
IEEE
139views VLSI» more  VLSID 2004»
14 years 9 months ago
Open Defects Detection within 6T SRAM Cells using a No Write Recovery Test Mode
The detection of all open defects within 6T SRAM cells is always a challenge due to the significant test time requirements. This paper proposes a new design-for-test (DFT) techniq...
André Ivanov, Baosheng Wang, Josh Yang
OSDI
2008
ACM
14 years 9 months ago
Gadara: Dynamic Deadlock Avoidance for Multithreaded Programs
Deadlock is an increasingly pressing concern as the multicore revolution forces parallel programming upon the average programmer. Existing approaches to deadlock impose onerous bu...
Manjunath Kudlur, Scott A. Mahlke, Stéphane...
ICSE
2003
IEEE-ACM
14 years 8 months ago
Architectural Level Risk Assessment Tool Based on UML Specifications
Recent evidences indicate that most faults in software systems are found in only a few of a system's components [1]. The early identification of these components allows an or...
T. Wang, Ahmed E. Hassan, Ajith Guedem, Walid Abde...
ICSE
2007
IEEE-ACM
14 years 8 months ago
The CRUTIAL Architecture for Critical Information Infrastructures
Abstract. In this chapter we discuss the susceptibility of critical information infrastructures to computer-borne attacks and faults, mainly due to their largely computerized natur...
Paulo Veríssimo, Nuno Ferreira Neves, Migue...
ICCD
2006
IEEE
127views Hardware» more  ICCD 2006»
14 years 5 months ago
Power Droop Testing
Circuit activity is a function of input patterns. When circuit activity changes abruptly, it can cause sudden drop or rise in power supply voltage. This change is known as power d...
Ilia Polian, Alejandro Czutro, Sandip Kundu, Bernd...