1187 search results - page 22 / 238 » On Modeling Cross-Talk Faults |
DATE
2006
IEEE
14 years 2 months ago
2006
IEEE
— We present a probabilistic fault model that allows any number of gates in an integrated circuit to fail probabilistically. Tests for this fault model, determined using the theo...
IPPS
2005
IEEE
14 years 2 months ago
2005
IEEE
Abstract— The increasing use of electronics in the automotive and avionic domain has lead to dramatic improvements with respect to functionality, safety, and cost. However, with ...
MTDT
2002
IEEE
14 years 1 months ago
2002
IEEE
The amount of memory being embedded on chip is growing rapidly. This strongly implies that memory Built-in-self-test (BIST) logic assumes utmost importance amongst all on chip sel...
SAFECOMP
2000
Springer
14 years 5 days ago
2000
Springer
Abstract. Simulation-based Fault Injection in VHDL descriptions is increasingly common due to the popularity of top-down design flows exploiting this language. This paper presents ...
FDTC
2010
Springer
13 years 6 months ago
2010
Springer
Many implementations of cryptographic algorithms have shown to be susceptible to fault attacks. For some of them, countermeasures against specific fault models have been proposed. ...